This paper presents a linear CMOS power amplifier (PA) for mm-wave 5G applications. A compact 8-way parallelparallel power combiner is proposed to increase Pout with low loss and symmetrical phase/amplitude. The IMD3 cancellation method is presented in this work to obtain a high linear POUT with high PAE. The PA in 65-nm CMOS shows a 23.2dBm POUT with 33.5% PAE for CW signals at 28GHz. It achieves the highest linear PAE of 17.6% at an average POUT of 18.
02dBm with -31.2dB EVM and -30dBc ACPR supporting a 256-QAM 100MSym/s signal at 28GHz.
